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I'm having systemverilog code and inside it I have instantiated sub blocks which are also written in system verilog but when I try to use config view, it shows view to use only (which i would keep as external HDL view) for top level and not for the sublocks which are instantiated in the blocks of top level. What should I do so that I can get sub blocks there as well so that I can keep it's view to use as external HDL view

Thank you

Thank you Sir😊 vy=Gm1*vx*(1/sc)=Gm1*(vx/sc)...(1) Therefoe ix=-io=Gm2*(-vy),ix=Gm2vy..(2) Substituting equation (1) into (2) ix=Gm2*Gm1*(vx/sc),vx/ix=sc/Gm1Gm2 So sc/Gm1Gm2=sL L=c/Gm1*Gm2....answer

Anyone here encountering issues where when you save the waveform as image, Cadence will crash?

Thanks for making this! Very clear, understandable and concise. I have been struggling to learn these concepts and this really made it click.

When tuner provides the various impedance to PA output, Pout is measured at 50ohm ( for example, Spectrum analyzer). How we know insertion loss from tuner input to 50ohm Pout measurement point under a specific tuner input impedance in order to calibrate out that insertion loss ?

Hey Mr jeffrey ,Can you please tell which software did you use to record the content ?? The video is very nicely made

First

great

angle H starts at -180

thanks!

could specify which cells are calculated or and which are given values. i'm also trying to make a link budget for a terrestrial link.

Thanks a lot ! I’m a master thesis student and you help me a lot

Great content. Thanks!

if current matching is a concern then Q6 Q8 both must have Vce=Veb

IB0 should also be added giving N+1 term

Ok so the SCTC is for big capacitances llike coupling or bypass and OCTC is for device capacitances.

Bode plots nice

Including ro for last one would have Rc||Rl parallel with r0

Hi, could you please upload or share privately EMX simulation of the transformer? or anything that details out EMX simulation? I am also using 22FDX-PLUS.

Incredibly useful and informative; thank you so much for putting out this tutorial!

Is Rz Cc-CL/Cc*1/GMII actually?

sir, I have a module that I have created with the help of Mosfet but now I want to plot the resistance of my entire module from the input port but here I am using the sp parameter method to get this plot while using the sp parameter i am applying pulse input as my module resistance changes with the number of pulses applied to it so I want to plot the real-time resistance of my module as it changes with time as it is a function of the number of pulses applied so with sp parameter I am unable to get this plot can you suggest any method where I could plot this

Sir, do you have license manager for ADS 2024?

ty

Could you please explain why u use Ps for both loss in inductor and input power?

Hi Professor, many thanks for your video! I am wondering do we need to change the differential port impedance to 100ohm and common mode port impedance to 25ohm for this evaluation? In this way, we can get correlated results as the 4 port evaluation using the conventional equation such as SDD11=0.5*(S11+S33-S13-S31). Thanks!

Excellent video, very precise and concise. Thanks!

Nice 👍😉

It's always a relief when someone who can speak english makes a video 🙏

looking forward your update too ㅠㅠ

Hi Professor. Thanks for your videos. They are really helpful and advanced. Could you please send the link of the video about transformer layout and EMX simulation? It would be appreciable.

this helped me very well in calculating the input capacitance to make accurate design of previous stage thank you very much.

Thank you very much for this lecture. If you don't mind, can you tell me how to load and source the 2nd and 3rd harmonics?

yo this was helpful thanks alot, keep posting.

looking forward your update

I appreciate you recommending these valuable video; I will definitely find them handy. WASK is so good optimization tool I think, I can suggest.

About the Opim Goal, you set Pin as sweep variable at single frequency. How to set Pin and frequency as sweep variables at the same time??

in 4:19, it should be Vov^2 in Id1 expression, right?

Thank you. It helped a lot.

Dear Professor I have a question. Why is drain current zero when PMOS in ON? Are we talking about NMOS drain current?

Thank you for your kind explanation. I wonder why the dc simulation result is so different from the s parameter sim. Can you give me your opinion?

In the above relationship, even for Rsw = 0, P_Rsw is non zero (should of been)

Shouldn't P_Rss be (2*VDD^2 / π^2) * ( Rsw / [Rsw+Ropt]^2 )?

Hello professor, would it be possible to share a sample matlab code we can start working with.

I think the xval function with the psp sim would return -1 to 1 GHz. So, you should add the pss freq to that.

Hello professor, could you please share a video on doing load pull and impedance matching using transformers in virtuoso.

Shouldn't efficiency be Pp/Ps assuming that our load is Rp?

I think that power entering the network should be 0.5*i^2 * Rs.

Hello professor,thanks for the video. It is very helpful. Could you please upload the video on using emx inside virtuoso environment as well.